1. Field of the Invention
The present invention relates to an electronic device and a method for manufacturing the same. In particular, the present invention relates to a multilayer ceramic electronic device in which a surface mount electronic device is mounted on a multilayer ceramic element assembly and a method for manufacturing the same.
2. Description of the Related Art
In recent years, performance of electronic devices in the electronics field has improved significantly and contributed to increased information processing speeds, miniaturization of apparatuses, and expansion in functionality of information processing apparatuses, e.g., large-scale computers, mobile communication terminals, and personal computers.
A multi-chip module (MCM) in which a plurality of semiconductor devices, e.g., very large scale integrations (VLSIs) and ultra large scale integrations (ULSIs), are mounted on a ceramic substrate has been used for such electronic devices. In such a module, a ceramic multilayer substrate, in which wiring conductors are three-dimensionally arranged, is commonly used to increase the packaging density of LSIs and to reliably electrically connect large scale integrations (LSIs).
This ceramic multilayer substrate is formed by laminating a plurality of ceramic layers and is provided with wiring conductors defining circuits on the surface of or inside the ceramic multilayer substrate. Regarding mobile communication terminals, such as cellular phones, automobile radio communication apparatuses, demands for high-performance, high-density mounting have increased and further miniaturization have been required. Furthermore, demands for improved impact resistance of products including ceramic multilayer substrates have been increasing.
As shown in FIG. 18, a method for mounting a semiconductor device on a substrate has been disclosed in which solder balls (bumps) 54 provided on a semiconductor element 53 are fusion-bonded to an electrically conductive pattern 52 formed on a substrate 51 using via electrodes, printed electrodes, and other suitable conductive elements, and, in addition, a thermosetting resin 55 that functions as an impact relaxation layer is filled between the substrate 51 and the semiconductor element 53, for the purpose of improving the impact resistance (see, for example, Japanese Unexamined Utility Model Registration Application Publication No. 4-99834).
The mounting method and the mounting structure improve the impact resistance of the ceramic multilayer substrate, and improve the impact resistance of products including ceramic multilayer substrates. However, when adaptation of such a mounting structure is intended, a further reduction in the area of an electrically conductive pattern, that is, a surface electrode, is necessary in order to miniaturize a product.
If the area of the surface electrode that provides the electrical conductivity is reduced, the diameter of the solder ball must be decreased, the distance between the substrate 51 and the semiconductor element 53 decreases, the thickness of the thermosetting resin (impact relaxation layer) 55 filled between the substrate 51 and the semiconductor element 53 decreases, and the impact resistance becomes insufficient with respect to a ceramic multilayer substrate provided with the mounting structure disclosed in Japanese Unexamined Utility Model Registration Application Publication No. 4-99834.
As shown in FIG. 19, a mounting structure (semiconductor apparatus) has been disclosed, in which, electrodes 62 provided on a back surface of a semiconductor element 61 are mounted on a multilayer circuit board 64 having a plurality of protruding electrodes 63 with top portions made of an electrically conductive adhesive and adjusted to be substantially flush with each other, the electrodes 62 of the semiconductor element 61 and the top portions of the protruding electrodes 63 are electrically connected, and a shrinkable insulating resin layer 65 is filled in a gap between the semiconductor element 61 and the multilayer circuit board 64 (see, for example, Japanese Unexamined Patent Application Publication No. 11-26631).
Moreover, it is believed that with the mounting structure disclosed in Japanese Unexamined Patent Application Publication No. 11-26631, the semiconductor element 61 can be mounted on the multilayer circuit board 64 with high reliability without requiring the multilayer circuit board 64 to be extremely flat.
However, there are limits to the amount that the diameter of the protruding electrode (columnar electrode) 63 can be reduced, the amount the aspect ratio, i.e. a ratio of the height to the diameter (height/diameter) of the protruding electrode (columnar electrode) 63 can be improved, and the amount the distance between adjacent protruded electrodes (columnar electrodes) 63 can be reduced. Therefore, it is difficult to satisfactorily meet the demands for protruding electrodes (columnar electrodes) 63 having smaller diameters and high aspect ratios.
Furthermore, with the mounting structure disclosed in Japanese Unexamined Patent Application Publication No. 11-26631, it is necessary to arrange the resin between the semiconductor element 61 and the multilayer circuit board 64 by injection after the semiconductor element 61 is mounted. However, the resin leaks from a lower region of the semiconductor element 61 to the surrounding region because of the viscosity of the resin and the state of leakage fluctuates. Therefore, when mounting the surface mount electronic devices other than the semiconductor element 61 on regions surrounding the semiconductor element 61, regions close to the region on which the semiconductor element 61 has been mounted cannot be effectively used as mounting spaces. Consequently, there is a problem in that high-density mounting of surface mount electronic devices is prevented.